Logic Gates Based on 3D Vertical Junctionless Gate-All-Around Transistors with Reliable Multilevel Contact Engineering

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Authors: Abhishek Kumar, Jonas Müller, Sylvain Pelloquin, Aurélie Lecestre, Guilhem Larrieu

Journal title: Nano Letters

Journal number: 24

Journal publisher: American Chemical Society

Published year: 2024

Published pages: 7825-7832

DOI identifier: 10.1021/acs.nanolett.3c04180

ISSN: 1530-6984